// 部分重要成员
struct drm_device {
    struct device *dev;
    
    const struct drm_driver *driver;			// driver
	struct drm_minor *primary, *render, *accel; // 分别对应三种不同的功能 accel对应的应该是GPGPU
	u32 driver_features; 						// driver支持的功能 DRIVER_MODESET DRIVER_GEM等
	
    struct drm_mode_config mode_config;			// 管理了kms中的几乎所有硬件节点 property func
												// crtc encoder connector plane都被链表管理起来供驱动选择
    											// 包括drm_mode_config_funcs：fb_create atomic_commit等
}

#include <stddef.h>
#include <errno.h>
#include <fcntl.h>
#include <stdbool.h>
#include <stdint.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <sys/mman.h>
#include <time.h>
#include <unistd.h>
#include <xf86drm.h>
#include <xf86drmMode.h>

struct buffer_object {
	uint32_t width;
	uint32_t height;
	uint32_t pitch;
	uint32_t handle;
	uint32_t size;
	uint8_t *vaddr;
	uint32_t fb_id;
};

struct buffer_object buf;

static int modeset_create_fb(int fd, struct buffer_object *bo)
{
	struct drm_mode_create_dumb create = {};
 	struct drm_mode_map_dumb map = {};

	/* create a dumb-buffer, the pixel format is XRGB888 */
	create.width = bo->width;
	create.height = bo->height;
	create.bpp = 32;
	drmIoctl(fd, DRM_IOCTL_MODE_CREATE_DUMB, &create);

	/* bind the dumb-buffer to an FB object */
	bo->pitch = create.pitch;
	bo->size = create.size;
	bo->handle = create.handle;
	drmModeAddFB(fd, bo->width, bo->height, 24, 32, bo->pitch,
			   bo->handle, &bo->fb_id);

	/* map the dumb-buffer to userspace */
	map.handle = create.handle;
	drmIoctl(fd, DRM_IOCTL_MODE_MAP_DUMB, &map);

	bo->vaddr = mmap(0, create.size, PROT_READ | PROT_WRITE,
			MAP_SHARED, fd, map.offset);

	/* initialize the dumb-buffer with white-color */
	memset(bo->vaddr, 0xff, bo->size);

	return 0;
}

static void modeset_destroy_fb(int fd, struct buffer_object *bo)
{
	struct drm_mode_destroy_dumb destroy = {};

	drmModeRmFB(fd, bo->fb_id);

	munmap(bo->vaddr, bo->size);

	destroy.handle = bo->handle;
	drmIoctl(fd, DRM_IOCTL_MODE_DESTROY_DUMB, &destroy);
}

int main(int argc, char **argv)
{
	int fd;
	drmModeConnector *conn;
	drmModeRes *res;
	uint32_t conn_id;
	uint32_t crtc_id;

	fd = open("/dev/dri/card0", O_RDWR | O_CLOEXEC);

	res = drmModeGetResources(fd);
	crtc_id = res->crtcs[0];
	conn_id = res->connectors[0];

	conn = drmModeGetConnector(fd, conn_id);
	buf.width = conn->modes[0].hdisplay;
	buf.height = conn->modes[0].vdisplay;

	modeset_create_fb(fd, &buf);

	drmModeSetCrtc(fd, crtc_id, buf.fb_id,
			0, 0, &conn_id, 1, &conn->modes[0]);

	getchar();

	modeset_destroy_fb(fd, &buf);

	drmModeFreeConnector(conn);
	drmModeFreeResources(res);

	close(fd);

	return 0;
}

// 定义某个helper function具体的操作
static void exynos_plane_atomic_update(struct drm_plane *plane, struct drm_atomic_state *state)
{
	struct drm_plane_state *new_state = drm_atomic_get_new_plane_state(state,
								           plane);
	struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(new_state->crtc);
	struct exynos_drm_plane *exynos_plane = to_exynos_plane(plane);

	if (!new_state->crtc)
		return;

	if (exynos_crtc->ops->update_plane)
		exynos_crtc->ops->update_plane(exynos_crtc, exynos_plane); // 硬件操作
}

// 定义某个硬件helper function集合
static const struct drm_plane_helper_funcs plane_helper_funcs = {
	.atomic_check = exynos_plane_atomic_check,
	.atomic_update = exynos_plane_atomic_update,
	.atomic_disable = exynos_plane_atomic_disable,
};

// 注册helper function到drm_plane
// 实际plane->helper_private = funcs;
drm_plane_helper_add(&exynos_plane->base, &plane_helper_funcs);

#include "qemu/osdep.h"
#include "qom/object.h"
#include "ui/console.h"
#include "hw/pci/pci_device.h"

typedef struct Fake_GPU_State Fake_GPU_State;

#define TYPE_FAKE_GPU "fake_gpu"
OBJECT_DECLARE_SIMPLE_TYPE(Fake_GPU_State, FAKE_GPU)

#define REG_NUM     8
#define REG_SIZE    4

typedef struct Fake_GPU_State
{
    PCIDevice parent_obj;

    MemoryRegion bar;
    uint32_t regs[REG_NUM];
}Fake_GPU_State;

static void fake_gpu_write(void *opaque, hwaddr addr, uint64_t value, unsigned size)
{
    Fake_GPU_State *s = FAKE_GPU(opaque);
    printf("wr\r\n");
    s->reg0 = value;
}

static uint64_t fake_gpu_read(void *opaque, hwaddr addr, unsigned size)
{
    Fake_GPU_State *s = FAKE_GPU(opaque);
    printf("rd\r\n");
    return s->reg0;
}

static const MemoryRegionOps fake_gpu_ops = {
    .write = fake_gpu_write,
    .read = fake_gpu_read,
};

static void fake_gpu_realize(PCIDevice *dev, Error **errp)
{
    Fake_GPU_State *s = FAKE_GPU(dev);

    printf("realize start\r\n");

    memory_region_init_io(&s->bar, OBJECT(s), &fake_gpu_ops, s, "fake_gpu", 32);
    pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->bar);
}

static void fake_gpu_exit(PCIDevice *dev)
{
    return ;
}

static void fake_gpu_class_init(ObjectClass *klass, void *data)
{
    //DeviceClass *dc = DEVICE_CLASS(klass);
    PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);

    k->realize = fake_gpu_realize;
    k->exit = fake_gpu_exit;
    k->vendor_id = 0x1234;
    k->device_id = 0xbeef;
    k->class_id = PCI_CLASS_OTHERS; // 一定要有否则报错 BAR0 not claimed
}

static const TypeInfo fake_gpu_info = {
    .name = TYPE_FAKE_GPU,
    .parent = TYPE_PCI_DEVICE,
    .instance_size = sizeof(Fake_GPU_State),
    .class_init    = fake_gpu_class_init,
    .interfaces = (InterfaceInfo[]) {
        { INTERFACE_CONVENTIONAL_PCI_DEVICE },
        { },
    }
};

static void fake_gpu_device_register_types(void)
{
    type_register_static(&fake_gpu_info);
}

type_init(fake_gpu_device_register_types);

typedef struct Fake_GPU_State
{
    PCIDevice parent_obj;

    QemuConsole* console;

    MemoryRegion bar;
    uint32_t regs[REG_NUM];

    void *pixels;
}Fake_GPU_State;

// 显示测试函数
static void fill_screen_with_yellow(uint32_t *buffer) {
    uint32_t *framebuffer = buffer;
    int total_pixels = 1024 * 768;

    // 黄色的 ARGB 格式
    uint32_t yellow_color = 0x00FFFF00;

    // 使用 memset 直接填充内存
    for (int i = 0; i < total_pixels; i++) {
        framebuffer[i] = yellow_color;
    }
}

// 初始化屏幕
static void fake_gpu_realize(PCIDevice *dev, Error **errp)
{
    Fake_GPU_State *s = FAKE_GPU(dev);

    printf("realize start\r\n");

    memory_region_init_io(&s->bar, OBJECT(s), &fake_gpu_ops, s, "fake_gpu", REG_NUM*REG_SIZE);
    pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->bar);

    s->pixels = malloc(PIXS_SIZE); // 为像素分配空间
    memset(s->pixels, 0, sizeof(PIXS_SIZE));

    s->console = graphic_console_init(DEVICE(dev), 0, &fake_gpu_graphic_ops, s);

    DisplaySurface* ds = qemu_create_displaysurface_from(1024, 768, PIXMAN_a8r8g8b8, 1024 * 4, s->pixels);
    fill_screen_with_yellow(s->pixels); // 初始化屏幕为黄色
    dpy_gfx_replace_surface(s->console, ds); // 替换画布
    dpy_gfx_update_full(s->console); // 显示
}

#include <linux/module.h>
#include <linux/pci.h>

#define DRV_NAME    "fake_gpu"
#define PCI_VENDOR_ID_FAKE_GPU    0x1234
#define PCI_DEVICE_ID_FAKE_GPU    0xbeef

volatile uint32_t __iomem *regs;

static const struct pci_device_id pci_table[] = {
    { PCI_DEVICE(PCI_VENDOR_ID_FAKE_GPU, PCI_DEVICE_ID_FAKE_GPU)},
    { },
};

static void fake_gpu_remove(struct pci_dev *pdev)
{

}

static int fake_gpu_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
{
    printk("This is a pci driver");
 	int ret;

	if (!pdev) 
	{
		printk("Invalid pci device pointer\n");
		return -EINVAL;
	}

	ret = pci_enable_device(pdev);
	if(ret)
	{
		printk("pci_enable_devices failed");
		return ret;
	}
	else
	{
		printk("nice try");
	}

	ret = pci_request_regions(pdev, DRV_NAME);
	if(ret)
	{
		printk("pci_request_regions failed");
	}

	resource_size_t pciaddr = pci_resource_start(pdev, 0);

	regs = ioremap(pciaddr, 32);

	    u32 reg_value = readl(regs);
    printk("Register value: 0x%x\n", reg_value);

    // 写入寄存器
    writel(0xDEADBEEF, regs);
    printk("Written value: 0xDEADBEEF\n");

	    reg_value = readl(regs);
    printk("Register value: 0x%x\n", reg_value);

	return ret;
}

static struct pci_driver fake_gpu_driver = {
    .name = DRV_NAME,
    .id_table = pci_table,
    .probe = fake_gpu_probe,
    .remove = fake_gpu_remove,
};

module_pci_driver(fake_gpu_driver);